First Verilog Code: Hello World

 🧠 Understanding the Concept

Unlike traditional programming languages, Verilog doesn’t print text to the screen in hardware. Instead, it uses simulation to display messages, helping you verify circuit behavior.

💻 Verilog “Hello World” Example

// Hello World in Verilog

module hello_world;

  initial begin

    $display("Hello, World!");

    $finish;

  end

endmodule

⚙️ Explanation

module hello_world; → Defines the module (similar to a program).

initial begin ... end → Block that runs once when simulation starts.

$display("Hello, World!"); → Prints the message during simulation.

$finish; → Ends the simulation.

▶️ How to Run

You can simulate this using tools like:

Icarus Verilog (iverilog)

ModelSim

Xilinx Vivado Simulator

Example terminal commands (for Icarus Verilog):

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